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Freescale Semiconductor /MKL28T7_CORE1 /LPIT1 /TCTRL2

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Interpret as TCTRL2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)T_EN 0 (0)CHAIN 0 (00)MODE 0 (0)TSOT 0 (0)TSOI 0 (0)TROT 0 (0)TRG_SRC 0 (0)TRG_SEL

MODE=00, T_EN=0, TROT=0, CHAIN=0, TRG_SRC=0, TSOI=0, TSOT=0, TRG_SEL=0

Description

Timer Control Register

Fields

T_EN

Timer Enable

0 (0): Timer Channel is disabled

1 (1): Timer Channel is enabled
CHAIN

Chain Channel

0 (0): Channel Chaining is disabled. Channel Timer runs independently.

1 (1): Channel Chaining is enabled. Timer decrements on previous channel’s timeout
MODE

Timer Operation Mode

0 (00): 32-bit Periodic Counter

1 (01): Dual 16-bit Periodic Counter

2 (10): 32-bit Trigger Accumulator

3 (11): 32-bit Trigger Input Capture
TSOT

Timer Start On Trigger

0 (0): Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)

1 (1): Timer starts to decrement when rising edge on selected trigger is detected
TSOI

Timer Stop On Interrupt

0 (0): Timer does not stop after timeout

1 (1): Timer will stop after timeout and will restart after rising edge on the T_EN bit is detected (i.e. timer channel is disabled and then enabled)
TROT

Timer Reload On Trigger

0 (0): Timer will not reload on selected trigger

1 (1): Timer will reload on selected trigger
TRG_SRC

Trigger Source

0 (0): Trigger source selected in external

1 (1): Trigger source selected is the internal trigger
TRG_SEL

Trigger Select

0 (0): Timer channel 0 trigger source is selected

1 (1): Timer channel 1 trigger source is selected

2 (10): Timer channel 2 trigger source is selected

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data